Recently, a nitride semiconductor as a group III-V compound semiconductor represented by gallium nitride (GaN) is expected to be applied to the switching element. This is because the nitride semiconductor has characteristics suitable for a power device, that is, its bandgap is as wide as 3.4 eV, its dielectric breakdown field is 10 times higher, and its electron saturation speed is 2.5 times higher than a conventional silicon (Si) semiconductor.
For example, a switching element having a hetero structure of GaN/AlGaN formed on a substrate of silicon carbide (SiC) or sapphire is proposed. According to this switching element, a two-dimensional electron gas layer having a high concentration of 1×1013 cm−2 is generated in an interface of GaN/AlGaN due to polarization by a piezo effect caused by lattice mismatch of AlGaN and GaN, in addition to spontaneous polarization caused by an asymmetric structure in a c-axis direction of a crystal structure (wurtzite structure) of GaN. To be used as the switching element, its states are to be switched between a state (on state) in which predetermined electrodes are electrically connected, and a state (off state) in which the predetermined electrodes are not electrically connected, by controlling the electron density of the two-dimensional electron gas layer.
FIG. 11 is a cross-sectional view illustrating a structure of the above switching element.
A conventional switching element 100 illustrated in FIG. 11 includes a substrate 101, a buffer layer 102 formed on an upper surface of the substrate 101, a carrier transit layer 103 (carrier channel layer) composed of undoped GaN, formed on an upper surface of the buffer layer 102, a carrier supply layer 104 composed of AlGaN, formed on an upper surface of the carrier transit layer 103, a source electrode 105 and a drain electrode 106 formed on an upper surface of the carrier supply layer 104, and a gate electrode 107 formed on the upper surface of the carrier supply layer 104 and formed between the source electrode 105 and the drain electrode 106.
Furthermore, a gate insulating film 110 is provided between the gate electrode 107 and the carrier supply layer 104 to suppress a gate leakage current.
The switching element 100 is a normally-on type element, so that even when a potential of the gate electrode 107 is the same (0 V) as that of the source electrode 105, or even when an open state is provided so that a voltage is not applied to the gate electrode 107, a two-dimensional electron gas layer 108 is generated in an interface of the carrier transit layer 103 with the carrier supply layer 104, and an on state is provided. When the potential of the drain electrode 106 is set higher than the potential of the source electrode 105, a current flows between the drain electrode 106 and the source electrode 105.
Meanwhile, when the potential of the gate electrode 107 is set to be a negative potential lower than a threshold voltage relative to the potential of the source electrode 105, the two-dimensional electron gas layer 108 is not generated in the interface of the carrier transit layer 103 with the carrier supply layer 104 under the gate electrode 107, and an off state is provided. In this state, a current does not flow between the drain electrode 106 and the source electrode 105.
FIG. 12 is a cross-sectional view schematically illustrating an essential portion of the switching element 100 in the off state. When the switching element 100 becomes the off state, as illustrated in FIG. 12, a depletion region 111 is formed under the gate electrode 107. At this time, as for the switching element 100 for the power device, a high potential difference (such as several 100 V corresponding to a power supply voltage) is generated between the drain electrode 106 and the source electrode 105. Consequently, a high electric field 112 is generated in the depletion region 111 on a side close to the drain electrode 106 under the gate electrode 107, and the element could be destroyed in the worst case.
In order to solve the above problem, there is a generally known method for relaxing the electric field generated under the gate electrode 107 on the side close to the drain electrode 106 by forming a structure in which the gate electrode 107 projects at least toward the drain electrode (field plate structure).
As illustrated in FIG. 13, a switching element 200 includes a substrate 201, a buffer layer 202 formed on an upper surface of the substrate 201, a carrier transit layer 203 composed of undoped GaN formed on an upper surface of the buffer layer 202, a carrier supply layer 204 composed of AlGaN formed on an upper surface of the carrier transit layer 203, a source electrode 205 and a drain electrode 206 formed on an upper surface of the carrier supply layer 204, a gate electrode 207 formed on the upper surface of the carrier supply layer 204, and formed between the source electrode 205 and the drain electrode 206 when viewed from a direction perpendicular to the substrate 201, and a gate insulating film 210 on a lower surface of the gate electrode 207 when needed. The gate electrode 207 is configured to project on a passivation layer (insulating layer) 209 formed on the upper surface of the carrier supply layer 204 at least toward the drain electrode 206.
However, even when the gate electrode employs the field plate structure, it is difficult to sufficiently relax a high electric field 212 generated near the gate electrode 207 when several hundred volts are applied between the source and drain electrodes. As a result, when the switching element 200 is kept in the off state for a long time such as several hundred hours while the high voltage is kept applied between the source and drain electrodes, the element is destroyed in the worst case because it is subjected to the high electric field for a long time.
As a method for relaxing the electric field near the gate electrode in the off state, similarly to a GaN MOSFET described in Patent Document 1, a reduced surface field (RESURF) region can be provided by doping an impurity in the carrier transit layer. In the off state, the electric field intensively applied to the gate electrode can be dispersed and applied to the RESURF region, so that a field effect transistor is considered to be improved in withstanding voltage.